50th European Solid-State Device Research Conference

46th European Solid-State Circuits Conference

Each presentation (~40-45min) will be available on-line.

Live Q&A sessions will be held (date and time TBA)

Chairs: M. Vinet (CEA) and Farhana Sheikh (Intel)

Full content duration ~6h


Abstract: Is Quantum Computing a myth or reality? The presenters in this tutorial provide a strong foundation in physics and engineering to the audience, demystifying the field of Quantum Computing. The broader electrical engineering community from materials to devices and circuits is invited to learn more about this emerging area of research and development. The objective is to provide a global picture of current hot topics: Materials, Control, Error Correction, Semiconductor-based Spin Qubits, Superconducting Spin Qubits, and Design Tools (such as simulation, CAD, modeling, and emulation).  For each topic, the presenters from both industry and academia will resolve the consensus and dissensus within the community for a fair vision of the state-of-the-art and research directions.  At the end of each topic session, time will be reserved for a Q&A to sort out what is myth and what is reality, so please bring your questions to challenge our academic and industry presenters.

Chairs: Matteo Perenzoni (FBK) and Albert Theuwissen (Harvest Imaging)

Full content duration ~6h


Abstract: The workshop on Emerging Solutions for Imaging will discuss leading-edge and frontier technologies for image sensors opening up new dimensions in the current landscape.

Imaging as usually conceived - visual pictures - is going to remain just a subset of the possibilities. The workshop will address which technologies, devices, circuits and systems are needed to explore the dimension of wavelength, beyond visible to uncover invisible details, and of modality from quantum to computational imaging, to overcome the limitations of classical imaging. The content is tailored to image sensor designers and device engineers willing to stay up-to-date with the latest emerging topics that could become the next big thing in imaging, with the possibility to link these to relevant application cases.

Chairs: Gabriel Molas (CEA) and Mahmut Sinangil (TSMC)

Full content duration ~6h

Abstract: Memories continue to be one of the key building blocks for achieving better performance and energy efficiency at the system level. While NAND Flash has been the widely used non-volatile memory solution, new NVM technologies have been emerging providing interesting power/performance/area trade-offs. This workshop will focus on non-volatile memory technologies and discuss the opportunities it can provide for system implementations as well as the challenges associated with different technologies. This workshop will be of interest to a large spectrum of audience; from device people, to circuit designers and system architectures and will target to enhance cross-disciplinary understanding of non-volatile memory technologies’ potential and challenges.

Chairs: Nadine Collaert (imec) and Stefan G. Andersson (Ericsson)

Full content duration ~6h


Abstract: The next generations of wireless communication, 5G and beyond, will bring a revolution in the way people will be connected. For the first time, mm-wave frequencies are being considered providing the required bandwidth, high data-rates and low latency for enhanced mobile broadband, massive IoT and mission-critical control. This will bring new challenges for the technologies enabling this next generation of mobile communication. 

In this workshop, we will address topics going from the system level all the way down to the technologies that will be key for 5G applications. It will include presentations of on-going and starting EU projects Taranto and Beyond 5 as well as leading companies from industry.

This workshop is open to all students, researchers and industry partners who want to learn more about 5G and beyond, its opportunities and challenges.

Chairs: Ionut Radu (Soitec) and Stefaan Decoutere (IMEC)

Full content duration ~6h


Abstract: Growing adoption of electric vehicles along with the rising trend of lightweight vehicles has been a key driver for power semiconductor devices, including diodes, silicon-controlled rectifiers (SCRs), thyristors, gate turn-off thyristors, power MOSFETs, and many others used for control and conversion of electric power. Recent progress in the wide-band-gap semiconductor such as GaN and SiC, combined with traditional Si-based insulated gate bipolar transistors (IGBTs) and MOSFETs offers multiple choices for system designers of each specific application. 

This event will bring together experts from both academia and industry providing comprehensive view of power devices, technologies and applications.

Chairs:  Sylvain Clerc (ST) and Keith Bowman (Qualcomm)

Full content duration ~4h

Abstract: Integrated circuit performance has long been constrained by power and reliability. This trend is expected to continue in future SoC and emerging IoT processors in autonomous vehicles and other applications. Meanwhile, technology scaling faces an increased sensitivity to device variability, ageing and environmental changes. In this context, adaptative designs have emerged to compensate for these variations to mitigate the costs, performance penalties, and energy-efficiency losses. This embedded monitoring forum is organized for recent key contributors in the field to present their views for how to tackle these variability challenges. The aspects of monitoring system architecture, placement, accuracy and matching are described along with the time to react to improve performance, reliability and energy efficiency.

Chairs:  Andreas Burg (EPFL) and Marian Verhelst (KUL)

Full content duration ~6h


ABSTRACT: Machine learning and AI continue to grow across almost all areas of application. While initially confined to data centers, AI now is pushed more and more to the extreme edge to process various types of sensor information directly to avoid the need for energy-hungry data transfer to the cloud. To be efficient, the energy efficiency requirements in these "tiny-AI" use cases are stringent and range from from milli Watts (for example for embedded image and video processing) all the way down to micro Watts for (example for keyword spotting or other always-on functions). For the design of corresponding circuits two approaches are competing: highly optimized, digital Von Neumann architectures and emerging alternative computing paradigms based on in-memory computing (IMC) and associated analog computations. While the Von Neumann approach has a head start, these new ideas are catching up. Which one prevails for what kind of applications and how to solve many of the issues with a totally different architectural approach is the central theme of this workshop. It is moreover important to realize that both paradigms can also strongly take advantage of emerging technologies, such as 3D stacking and novel memory devices. As such, the workshop addresses both the ESSDERC and ESSCIRC community and targets discussions among circuit and architecture experts, but well as technology and device experts, to explore the potential of beyond CMOS technologies for edge AI solutions.

Chairs:  Denis Rideau (ST) and Philippe Blaise (Silvaco)

Full content duration ~3h


Abstract: “This tutorial will introduce to atomistic methods such as Density Functional Theory (DFT), Molecular Dynamics (MD) and Non-Equilibrium Green's Functions (NEGF). Novel simulation techniques to determine atomistic details of bulk and device properties will be address, with special emphasis on applications to materials for nano/opto electronics.   The tutorial will explore the potentialities of atomistic methods in predicting the physics of these new materials and structures, including defects and their electrical and optical properties, but will also discuss how to bridge the results of simulations with experiments and spectroscopic signatures.”

Chairs: Bora Nikolic (BWRC)

Full content duration ~3h



This workshop will detail step by step generation and implementation of a Berkeley University RISC-V SoC mapped on a demonstration technology.

The attendance will go through each generation/configuration steps until RTL level design simulation

Chairs:  Thierry Baron (CEA, LTM/UGA) and Audrey Dieudonné (UGA)

Full content duration ~3h


Abstract: The access to raw materials is a major economic and geopolitical stake for the 21st century. Key resources/materials being used today in the emerging devices for the Internet of Things (IoT) must be substituted or drastically reduced in the near future. Tens of billions of electronics objects are being disseminated all over the world in homes, buildings, cars, roads, etc., therefore it is obviously a major concern to develop a sustainable electronic industry mindful of its impact right from the conception of these objects to their final use/consumption. In this workshop, we propose to bring together academics and industrials in Social, Economics and Physics/Chemistry and Technological Sciences to exchange about innovative solutions to develop a more sustainable nanoelectronics ecosystem.

Chair: Philipp Häfliger

Full content duration ~3h


Abstract: Emerging monolithic/sequential 3D integration of CMOS circuits reaches

high interconnection densities of close to 108 per mm2. Consequently, inter-tier vias do no longer require any significant sacrifice of layout space. Combining 3D CMOS tiers of different

technology nodes offers now a unique opportunity for cost effective and high performance mixed signal architectures in particular. The WS will present technology development and architecture show cases of the 3D-MUSE EU-project (https://www.3dmuse.eu).

Chair: Wladek Grabinski

Full content duration ~6h


Abstract: MOS-AK is HiTech forum to discuss the frontiers of electron device modeling with emphasis on FOSS simulation-aware compact/SPICE models and its Verilog-A standardization.

The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe, GaN, InP, and others) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/MEMS/SoC/Bio/Med and related) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.

Chairs: Dominique Thomas (ST), Klaus Pressel (Infineon), Rainer Pforr (Zeiss)

Full content duration ~6h

In December 2018 the European Commission approved a project proposal of four EU member states - France, Germany, Italy and the UK – to start an Important Project of Common European Interest (IPCEI) on Microelectronics. The project's overall objective is to enable research and development and first industrial deployment of innovative technologies and advanced electronics components (e.g. chips, integrated circuits, and sensors etc.) that can be integrated in a large set of downstream device applications.

The integrated research and innovation project involves 27 direct participants involved in 5 complementary Technology Fields, and involves a large number of partners. The IPCEI on microelectronics will have completed its first two and a half years at the time of the webinar. The direct participants will present highlights of the technologies and devices developed within the project, as well as cooperation spurred by it. The presentations will illustrate each of the 5 Technology Fields: Energy efficient chips; Power semiconductors, Smart sensors; Advanced Optical equipment and Compound materials semiconductors.

 50th European Solid-State Device Research Conference

  • LinkedIn

 46th European Solid-State Circuite Conference

ESSCIRC ESSDERC 2020 | September 14-18